RISC-V
Status
Beta
Version
QEMU Toolchain: QEMU 7.1, GCC 11.3.0, Binutils 2.38
ISA String: RV64GCV_Zba_Zbb_Zbc_Zbs_Zbkx_Zk_Zks
Codewars uses QEMU user mode emulation to support RISC-V content. Codewars is configured to use the following extensions for RISC-V:
G- General-Purpose*C- Compressed*V- Vector*†- Zb* - Bit-Manipulation‡
Zba- Address GenerationZbb- BasicZbc- Carry-lessZbs- Single-bit
- Cryptography - Scalar§
Zbkx- Crossbar permutationZk- StandardZks- ShangMi
The most recent version of the specification for each can be downloaded below (as of 26 Dec 2023):
- *RISC-V Unprivileged Specification
- †Vector Extension Specification
- ‡Bit-Manipulation Extension Specification
- §Cryptography Extension Specification
Test Frameworks
Timeout
12 seconds
Packages
Cgreen test framework (libcgreen)
Services
None
Language ID
riscv